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논문 기본정보
나노미터 MOSFET비휘발성 메모리 소자 구조의 탐색
논문 개요
| 기관명 | NDSL |
|---|---|
| 저널명 | 반도체디스플레이기술학회지 = Journal of the semiconductor display technology |
| ISSN | 1738-2270, |
| ISBN |
논문저자 및 소속기관 정보
| 저자(한글) | |
|---|---|
| 저자(영문) | |
| 소속기관 | |
| 소속기관(영문) | |
| 출판인 | |
| 간행물 번호 | |
| 발행연도 | 2015-01-01 |
| 초록 | From 20nm technology node, the finFET has become standard device for ULSI's. However, the finFET process made stacking gate non-volatile memory obsolete. Some reported capacitor-less DRAM structure by utilizing the FBE. We present possible non-volatile memory device structure similar to the dual gate MOSFET. One of the gates is left floating. Since body of the finFET is only 40nm thick, control gate bias can make electron tunneling through the floating gate oxide which sits across the body. For programming, gate is biased to accumulation mode with few volts. Simulation results show that the programming electron current flows at the interface between floating gate oxide and the body. It also shows that the magnitude of the programming current can be easily controlled by the drain voltage. Injected electrons at the floating gate act similar to the body bias which changes the threshold voltage of the device. |
| 원문URL | http://click.ndsl.kr/servlet/OpenAPIDetailView?keyValue=03553784&target=NART&cn=JAKO201506363291105 |
| 첨부파일 |
추가정보
| 과학기술표준분류 | |
|---|---|
| ICT 기술분류 | |
| DDC 분류 | |
| 주제어 (키워드) | floating body effect,finFET,non-volatile memory,dual gate MOSFET,simulation,kink effect,capacitorless DRAM,SOI |