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논문 기본정보
A Single-Phase Cell-Based Asymmetrical Cascaded Multilevel Inverter
논문 개요
| 기관명 | NDSL |
|---|---|
| 저널명 | Journal of power electronics : JPE |
| ISSN | 1598-2092, |
| ISBN |
논문저자 및 소속기관 정보
| 저자(한글) | Singh, Varsha,Pattnaik, Swapnajit,Gupta, Shubhrata,Santosh, Bokam |
|---|---|
| 저자(영문) | |
| 소속기관 | |
| 소속기관(영문) | |
| 출판인 | |
| 간행물 번호 | |
| 발행연도 | 2016-01-01 |
| 초록 | A single-phase asymmetrical cascaded multilevel inverter is introduced with the goal of increasing power quality with the reduction of power in insulated-gate bipolar transistor (IGBT) switches. In the present work, the proposed inverter topology is analyzed and generalized with respect to different proposed algorithms for choosing different voltage source values. To prove the advantages of the proposed inverter, a case study involving a 17-level inverter is conducted. The simulation and experimental results with reduced THD are also presented and compared with the MATLAB/SIMULINK simulation results. Finally, the proposed topology is compared with different multilevel inverter topologies available in the literature in terms of the number of IGBT switches required with respect to the number of levels generated in the output of inverter topologies. |
| 원문URL | http://click.ndsl.kr/servlet/OpenAPIDetailView?keyValue=03553784&target=NART&cn=JAKO201616960479244 |
| 첨부파일 |
추가정보
| 과학기술표준분류 | |
|---|---|
| ICT 기술분류 | |
| DDC 분류 | |
| 주제어 (키워드) | Multilevel inverter,Power losses,Total harmonic distortion (THD) |